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RISC-V

!riscv@lemmy.ml

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Milk-V’s Pioneer Is a Tall Glass of Cold RISC-V with 64 Cores, Up to 128GB of RAM

@testman@lemmy.ml

QEMU 8.0 Virtualization Software Released with New ARM and RISC-V Features - 9to5Linux

Arthur Besse

Pine Store is now accepting orders for their RISC-V tablet with detachable backlit keyboard, delivery late May. (will ship without an OS, it’s intended for devs to help bring up Linux or BSD on it.)

@testman@lemmy.ml

The RISC-V Revolution

@testman@lemmy.ml

[Explaining Computers on Youtube] RISC-V 2023 Update: From Embedded Computing to Data Center & Desktop

@PublicLewdness@lemmy.ml

Ubuntu Adds Support for PolarFire SoC FPGA Icicle Kit

Ubuntu has announced support for The PolarFire SoC FPGA Icicle Kit RISC-V Board. I am not always a huge fan of Ubuntu but if you're looking to get into RISC-V boards they seem to be always on the forefront of support. RISC-V is a great platform to get into as many boards have an open source BIOS and the architecture as a whole is a lot more open than x86. The board can be found on Mouser among other stores. https://www.mouser.ca/new/microchip/microchip-polarfire-soc-icicle-kit

Ubuntu Adds Support for PolarFire SoC FPGA Icicle Kit

Arthur Besse

Google wants RISC-V to be a “tier-1” Android architecture

@kixik@lemmy.ml

“RISC-V is Inevitable”—A Tale of Two RISC-V Summit Keynotes - News

[r/opensource](https://libreddit.spike.codes/r/opensource/comments/zqxox2/riscv_is_inevitablea_tale_of_two_riscv_summit)

“RISC-V is Inevitable”—A Tale of Two RISC-V Summit Keynotes - News

Arthur Besse

The Single Board Computer Database, a comparison website for SBCs and SOMs (formerly known as Board-DB), has relaunched!

Thanks to [@MartijnBraam](https://lemmy.ml/u/MartijnBraam): https://blog.brixit.nl/finding-an-sbc/

The Single Board Computer Database, a comparison website for SBCs and SOMs (formerly known as Board-DB), has relaunched!

Arthur Besse

Arm will prohibit the proximity of its CPU and third-party modules in one chip, as well as impose royalties on manufacturers of end devices - are they trying to accelerate the transition to RISC-V?!

@testman@lemmy.ml

RISC-V Celebrates Upstreaming of Android Open Source Project RISC-V Port

@testman@lemmy.ml

October update: An Ox, no bull | PINE64

cross-posted from: https://lemmy.ml/post/545536 > at [r/PINE64official](https://libreddit.spike.codes/r/PINE64official/comments/y4xff6/october_update_an_ox_no_bull_pine64)

October update: An Ox, no bull | PINE64

@testman@lemmy.ml

The Past, Present and Future of RISC-V

Arthur Besse

Arm: We respect RISC-V but it’s not a rival in datacenters

Arthur Besse

NASA Selects SiFive and Makes RISC-V the Go-to Ecosystem for Future Space Missions

@vitaminka@lemmy.ml

[VisionFive 2] FIRST REVIEW for the newest RISC-V Product!

@alatheus@lemmy.perthchat.org

Ubuntu Now Supports The Allwinner D1 Powered Nezha RISC-V Board

Where do I buy one?

Ubuntu Now Supports The Allwinner D1 Powered Nezha RISC-V Board

Arthur Besse

Arthur Besse
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bret.dk
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10M

Raspberry Pi Zero vs MangoPi MQ Pro Benchmarks

Arthur Besse
•
bret.dk
•
10M

@testman@lemmy.ml

Star64, a RISC-V SOC from Pine64

third chapter of the July Update blogpost

Star64, a RISC-V SOC from Pine64

@testman@lemmy.ml

RISC-V only takes 12 years to achieve the milestone of 10 billion cores, 5 years faster than ARM.

overflow

overflow
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fosdem.org
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10M

A year of RISC-V adventures: embracing chaos in your software journey

overflow
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fosdem.org
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10M

@incici@lemmy.ml

@incici@lemmy.ml
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www.phoronix.com
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edit-2
1Y
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There is a RISC-V laptop on the way!

Specs look good. I wonder which distros will support RISC-V now?

There is a RISC-V laptop on the way!

@incici@lemmy.ml
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www.phoronix.com
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edit-2
1Y
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@incici@lemmy.ml

Pine64 is working on a RISC-V board!

This is great for moving RISC-V to mainstream. Pine64 makes great hardware.

Pine64 is working on a RISC-V board!

Arthur Besse

A RISC-V laptop or mini PC with Rockchip RK3588-class performance may be coming soon

@vitaminka@lemmy.ml

Debian running on the RISC-V board 😁

@vitaminka@lemmy.ml

Just received my first tiny RISC-V computer

cross-posted from: https://lemmy.ml/post/299185 > two usb C ports on the top left for scale, currently trying to figure out how to build a linux image for it 🤷‍♀️

Just received my first tiny RISC-V computer

overflow

overflow
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github.com
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1Y

GitHub - risc0/risc0: RISC Zero is a zero-knowledge verifiable general computing platform based on zk-STARKs and the RISC-V microarchitecture.

overflow
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github.com
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1Y

@testman@lemmy.ml

Explaining RISC-V: An x86 & ARM Alternative

Arthur Besse

Arthur Besse
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youtu.be
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1Y
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“RISC-V is trying to launch an open-hardware revolution” (2020 video from Engadget’s Upscaled)

cross-posted from: https://lemmy.ml/post/67536

“RISC-V is trying to launch an open-hardware revolution” (2020 video from Engadget’s Upscaled)

Arthur Besse
•
youtu.be
•
1Y
•

Arthur Besse

Arthur Besse
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dev.to
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1Y

Introduction to RISC V and Assembly Language for Beginners (15 minute video)

Arthur Besse
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dev.to
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1Y

@testman@lemmy.ml

Nezha RISC-V Linux SBC

@testman@lemmy.ml

VisionFive RISC-V Linux SBC

overflow

SiFive bags $175m to further challenge Arm with RISC-V

@testman@lemmy.ml

Why RISC-V Is Succeeding

@testman@lemmy.ml

Intel makes deep investment in RISC-V community

@AgreeableLandscape@lemmy.ml

Edge AI on Low-Footprint RISC-V | Alexander Stanitzki, Fraunhofer IMS

@kixik@lemmy.ml

Future Corporation Partners with AB Open for Unique RISC-V PC Project - AB Open

[reddit](https://teddit.net/r/RISCV/comments/rt3wc3/future_corporation_partners_with_ab_open_for)

Future Corporation Partners with AB Open for Unique RISC-V PC Project - AB Open

@testman@lemmy.ml

RISC-V Summit 2021 playlist

@kixik@lemmy.ml

Chinese Academy of Sciences announces Nanhu RISC-V chip

[reddit](https://teddit.net/r/RISCV/comments/rbn0td/china_is_really_going_to_be_pushing_the_riscv)

Chinese Academy of Sciences announces Nanhu RISC-V chip

@kixik@lemmy.ml

Imagination Launches Catapult Family of RISC-V CPU Cores: Breaking Into Heterogeneous SoCs

[reddit comments](https://teddit.net/r/hardware/comments/raawx1/anandtech_imagination_launches_catapult_family_of)

Imagination Launches Catapult Family of RISC-V CPU Cores: Breaking Into Heterogeneous SoCs

RISC-V

!riscv@lemmy.ml

Create a post

RISC-V (pronounced “risk-five”) is a license-free, modular, extensible instruction set architecture (ISA).

riscv.org

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RISC-V

Milk-V’s Pioneer Is a Tall Glass of Cold RISC-V with 64 Cores, Up to 128GB of RAMplus-square

Milk-V’s Pioneer Is a Tall Glass of Cold RISC-V with 64 Cores, Up to 128GB of RAMplus-square

QEMU 8.0 Virtualization Software Released with New ARM and RISC-V Features - 9to5Linuxplus-square

QEMU 8.0 Virtualization Software Released with New ARM and RISC-V Features - 9to5Linuxplus-square

Pine Store is now accepting orders for their RISC-V tablet with detachable backlit keyboard, delivery late May. (will ship without an OS, it’s intended for devs to help bring up Linux or BSD on it.)plus-square

Pine Store is now accepting orders for their RISC-V tablet with detachable backlit keyboard, delivery late May. (will ship without an OS, it’s intended for devs to help bring up Linux or BSD on it.)plus-square

[Explaining Computers on Youtube] RISC-V 2023 Update: From Embedded Computing to Data Center & Desktopplus-square

[Explaining Computers on Youtube] RISC-V 2023 Update: From Embedded Computing to Data Center & Desktopplus-square

Ubuntu Adds Support for PolarFire SoC FPGA Icicle Kitplus-square

Ubuntu Adds Support for PolarFire SoC FPGA Icicle Kitplus-square

Google wants RISC-V to be a “tier-1” Android architectureplus-square

Google wants RISC-V to be a “tier-1” Android architectureplus-square

“RISC-V is Inevitable”—A Tale of Two RISC-V Summit Keynotes - Newsplus-square

“RISC-V is Inevitable”—A Tale of Two RISC-V Summit Keynotes - Newsplus-square

RISC-V Celebrates Upstreaming of Android Open Source Project RISC-V Portplus-square

RISC-V Celebrates Upstreaming of Android Open Source Project RISC-V Portplus-square

October update: An Ox, no bull | PINE64plus-square

October update: An Ox, no bull | PINE64plus-square

The Past, Present and Future of RISC-Vplus-square

The Past, Present and Future of RISC-Vplus-square

Arm: We respect RISC-V but it’s not a rival in datacentersplus-square

Arm: We respect RISC-V but it’s not a rival in datacentersplus-square

NASA Selects SiFive and Makes RISC-V the Go-to Ecosystem for Future Space Missionsplus-square

NASA Selects SiFive and Makes RISC-V the Go-to Ecosystem for Future Space Missionsplus-square

[VisionFive 2] FIRST REVIEW for the newest RISC-V Product!plus-square

[VisionFive 2] FIRST REVIEW for the newest RISC-V Product!plus-square

Ubuntu Now Supports The Allwinner D1 Powered Nezha RISC-V Boardplus-square

Ubuntu Now Supports The Allwinner D1 Powered Nezha RISC-V Boardplus-square

Raspberry Pi Zero vs MangoPi MQ Pro Benchmarksplus-square

Raspberry Pi Zero vs MangoPi MQ Pro Benchmarksplus-square

Star64, a RISC-V SOC from Pine64plus-square

Star64, a RISC-V SOC from Pine64plus-square

RISC-V only takes 12 years to achieve the milestone of 10 billion cores, 5 years faster than ARM.plus-square

RISC-V only takes 12 years to achieve the milestone of 10 billion cores, 5 years faster than ARM.plus-square

There is a RISC-V laptop on the way!plus-square

There is a RISC-V laptop on the way!plus-square

Pine64 is working on a RISC-V board!plus-square

Pine64 is working on a RISC-V board!plus-square

A RISC-V laptop or mini PC with Rockchip RK3588-class performance may be coming soonplus-square

A RISC-V laptop or mini PC with Rockchip RK3588-class performance may be coming soonplus-square

GitHub - risc0/risc0: RISC Zero is a zero-knowledge verifiable general computing platform based on zk-STARKs and the RISC-V microarchitecture.plus-square

GitHub - risc0/risc0: RISC Zero is a zero-knowledge verifiable general computing platform based on zk-STARKs and the RISC-V microarchitecture.plus-square

Explaining RISC-V: An x86 & ARM Alternativeplus-square

Explaining RISC-V: An x86 & ARM Alternativeplus-square

“RISC-V is trying to launch an open-hardware revolution” (2020 video from Engadget’s Upscaled)plus-square

“RISC-V is trying to launch an open-hardware revolution” (2020 video from Engadget’s Upscaled)plus-square

Introduction to RISC V and Assembly Language for Beginners (15 minute video)plus-square

Introduction to RISC V and Assembly Language for Beginners (15 minute video)plus-square

Nezha RISC-V Linux SBCplus-square

Nezha RISC-V Linux SBCplus-square

VisionFive RISC-V Linux SBCplus-square

VisionFive RISC-V Linux SBCplus-square

SiFive bags $175m to further challenge Arm with RISC-Vplus-square

SiFive bags $175m to further challenge Arm with RISC-Vplus-square

Why RISC-V Is Succeedingplus-square

Why RISC-V Is Succeedingplus-square

Future Corporation Partners with AB Open for Unique RISC-V PC Project - AB Openplus-square

Future Corporation Partners with AB Open for Unique RISC-V PC Project - AB Openplus-square

Chinese Academy of Sciences announces Nanhu RISC-V chipplus-square

Chinese Academy of Sciences announces Nanhu RISC-V chipplus-square

Imagination Launches Catapult Family of RISC-V CPU Cores: Breaking Into Heterogeneous SoCsplus-square

Imagination Launches Catapult Family of RISC-V CPU Cores: Breaking Into Heterogeneous SoCsplus-square

RISC-V

Lemmyminus-square

A community of privacy and FOSS enthusiasts, run by Lemmy’s developers

Rules

Milk-V’s Pioneer Is a Tall Glass of Cold RISC-V with 64 Cores, Up to 128GB of RAM

Milk-V’s Pioneer Is a Tall Glass of Cold RISC-V with 64 Cores, Up to 128GB of RAM

QEMU 8.0 Virtualization Software Released with New ARM and RISC-V Features - 9to5Linux

QEMU 8.0 Virtualization Software Released with New ARM and RISC-V Features - 9to5Linux

Pine Store is now accepting orders for their RISC-V tablet with detachable backlit keyboard, delivery late May. (will ship without an OS, it’s intended for devs to help bring up Linux or BSD on it.)

Pine Store is now accepting orders for their RISC-V tablet with detachable backlit keyboard, delivery late May. (will ship without an OS, it’s intended for devs to help bring up Linux or BSD on it.)

[Explaining Computers on Youtube] RISC-V 2023 Update: From Embedded Computing to Data Center & Desktop

[Explaining Computers on Youtube] RISC-V 2023 Update: From Embedded Computing to Data Center & Desktop

Ubuntu Adds Support for PolarFire SoC FPGA Icicle Kit

Ubuntu Adds Support for PolarFire SoC FPGA Icicle Kit

Google wants RISC-V to be a “tier-1” Android architecture

Google wants RISC-V to be a “tier-1” Android architecture

“RISC-V is Inevitable”—A Tale of Two RISC-V Summit Keynotes - News

“RISC-V is Inevitable”—A Tale of Two RISC-V Summit Keynotes - News

RISC-V Celebrates Upstreaming of Android Open Source Project RISC-V Port

RISC-V Celebrates Upstreaming of Android Open Source Project RISC-V Port

October update: An Ox, no bull | PINE64

October update: An Ox, no bull | PINE64

The Past, Present and Future of RISC-V

The Past, Present and Future of RISC-V

Arm: We respect RISC-V but it’s not a rival in datacenters

Arm: We respect RISC-V but it’s not a rival in datacenters

NASA Selects SiFive and Makes RISC-V the Go-to Ecosystem for Future Space Missions

NASA Selects SiFive and Makes RISC-V the Go-to Ecosystem for Future Space Missions

[VisionFive 2] FIRST REVIEW for the newest RISC-V Product!

[VisionFive 2] FIRST REVIEW for the newest RISC-V Product!

Ubuntu Now Supports The Allwinner D1 Powered Nezha RISC-V Board

Ubuntu Now Supports The Allwinner D1 Powered Nezha RISC-V Board

Raspberry Pi Zero vs MangoPi MQ Pro Benchmarks

Raspberry Pi Zero vs MangoPi MQ Pro Benchmarks

Star64, a RISC-V SOC from Pine64

Star64, a RISC-V SOC from Pine64

RISC-V only takes 12 years to achieve the milestone of 10 billion cores, 5 years faster than ARM.

RISC-V only takes 12 years to achieve the milestone of 10 billion cores, 5 years faster than ARM.

There is a RISC-V laptop on the way!

There is a RISC-V laptop on the way!

Pine64 is working on a RISC-V board!

Pine64 is working on a RISC-V board!

A RISC-V laptop or mini PC with Rockchip RK3588-class performance may be coming soon

A RISC-V laptop or mini PC with Rockchip RK3588-class performance may be coming soon

GitHub - risc0/risc0: RISC Zero is a zero-knowledge verifiable general computing platform based on zk-STARKs and the RISC-V microarchitecture.

GitHub - risc0/risc0: RISC Zero is a zero-knowledge verifiable general computing platform based on zk-STARKs and the RISC-V microarchitecture.

Explaining RISC-V: An x86 & ARM Alternative

Explaining RISC-V: An x86 & ARM Alternative

“RISC-V is trying to launch an open-hardware revolution” (2020 video from Engadget’s Upscaled)

“RISC-V is trying to launch an open-hardware revolution” (2020 video from Engadget’s Upscaled)

Introduction to RISC V and Assembly Language for Beginners (15 minute video)

Introduction to RISC V and Assembly Language for Beginners (15 minute video)

Nezha RISC-V Linux SBC

Nezha RISC-V Linux SBC

VisionFive RISC-V Linux SBC

VisionFive RISC-V Linux SBC

SiFive bags $175m to further challenge Arm with RISC-V

SiFive bags $175m to further challenge Arm with RISC-V

Why RISC-V Is Succeeding

Why RISC-V Is Succeeding

Future Corporation Partners with AB Open for Unique RISC-V PC Project - AB Open

Future Corporation Partners with AB Open for Unique RISC-V PC Project - AB Open

Chinese Academy of Sciences announces Nanhu RISC-V chip

Chinese Academy of Sciences announces Nanhu RISC-V chip

Imagination Launches Catapult Family of RISC-V CPU Cores: Breaking Into Heterogeneous SoCs

Imagination Launches Catapult Family of RISC-V CPU Cores: Breaking Into Heterogeneous SoCs

Lemmy